src/hardware/Operation.js
/**
* The Molasses Instruction Set
*
* Instruction groups:
* - Control
* - Program counter
* - Arithmatic/logic (ALU)
* - Move (assignment)
*/
var operation = {
XCHG: 0xEB, // exchange registers DE and HL
XTHL: 0xE3, // exchange stack SP and HL
SPHL: 0xF9, // load SP from HL
PCHL: 0xE9, // load program counter from HL
/** Store/load accumulator at location BC or location DE */
STAX_B: 0x02, STAX_D: 0x12, LDAX_B: 0x0A, LDAX_D: 0x1A,
/** store/load H L direct, store/load accumulator direct */
SHLD: 0x22, LHLD: 0x2A, STA: 0x32, LDA: 0x3A,
/** Load Register pair with 16-bit value */
LXI_B: 0x01, LXI_D: 0x11, LXI_H: 0x21, LXI_SP:0x31,
/** Push and pop registers */
POP_B: 0xC1, PUSH_B: 0xC5,
POP_D: 0xD1, PUSH_D: 0xD5,
POP_H: 0xE1, PUSH_H: 0xE5,
POP_PS:0xF1, PUSH_PS:0xF5,
/** Control group */
NOP: 0x00, HLT: 0x76, // No operation, Halt process
IN: 0xD3, OUT: 0xDB, // Input, output
DI: 0xF3, EI: 0xFB, // enable interrupt, disable interrupt
CMC: 0x3F, CMA: 0x2F, // complement carry, complement a
STC: 0x37, // set carry
/* Jump | Call | Return | Interrupt */
JMP: 0xC3, CALL:0xCD, RET: 0xC9, RST_0: 0xC7,
JNZ: 0xC2, CNZ: 0xC4, RNZ: 0xC0, RST_1: 0xCF,
JNC: 0xD2, CNC: 0xD4, RNC: 0xD0, RST_2: 0xD7,
JPO: 0xE2, CPO: 0xE4, RPO: 0xE0, RST_3: 0xDF,
JP: 0xF2, CP: 0xF4, RP: 0xF0, RST_4: 0xE7,
JZ: 0xCA, CZ: 0xCC, RZ: 0xC8, RST_5: 0xEF,
JC: 0xDA, CC: 0xDC, RC: 0xD8, RST_6: 0xF7,
JPE: 0xEA, CPE: 0xEC, RPE: 0xE8, RST_7: 0xFF,
JM: 0xFA, CM: 0xFC, RM: 0xF8,
/* Left w/ C | Rotate Left| Right w/ C | Rotate Right */
RLC: 0x07, RAL: 0x17, RRC: 0x0F, RAR: 0x1F,
/* Double add | Decimal adjust accumulator */
DAD_B: 0x09, DAD_D: 0x19, DAD_H: 0x29, DAD_SP:0x39, DAA: 0x27,
/* addition | w/ carry | subtraction| w/ carry */
ADD_B: 0x80, ADC_B: 0x88, SUB_B: 0x90, SBB_B: 0x98,
ADD_C: 0x81, ADC_C: 0x89, SUB_C: 0x91, SBB_C: 0x99,
ADD_D: 0x82, ADC_D: 0x8A, SUB_D: 0x92, SBB_D: 0x9A,
ADD_E: 0x83, ADC_E: 0x8B, SUB_E: 0x93, SBB_E: 0x9B,
ADD_H: 0x84, ADC_H: 0x8C, SUB_H: 0x94, SBB_H: 0x9C,
ADD_L: 0x85, ADC_L: 0x8D, SUB_L: 0x95, SBB_L: 0x9D,
ADD_M: 0x86, ADC_M: 0x8E, SUB_M: 0x96, SBB_M: 0x9E,
ADD_A: 0x87, ADC_A: 0x8F, SUB_A: 0x97, SBB_A: 0x9F,
ADI: 0xC6, ACI: 0xCE, SUI: 0xD6, SBI: 0xDE,
/* Increment reg | Decrement reg | inc/dcr register pair */
INR_B: 0x04, DCR_B: 0x05, INX_B: 0x03,
INR_C: 0x0C, DCR_C: 0x0D, INX_D: 0x03,
INR_D: 0x14, DCR_D: 0x15, INX_H: 0x03,
INR_E: 0x1C, DCR_E: 0x1D, INX_SP:0x03,
INR_H: 0x24, DCR_H: 0x25, DCX_B: 0x03,
INR_L: 0x2C, DCR_L: 0x2D, DCX_D: 0x03,
INR_M: 0x34, DCR_M: 0x35, DCX_H: 0x03,
INR_A: 0x3C, DCR_A: 0x3D, DCX_SP:0x03,
/* and bits | xor bits | or bits | compare diff */
ANA_B: 0xA0, XRA_B: 0xA8, ORA_B: 0xB0, CMP_B: 0xB8,
ANA_C: 0xA1, XRA_C: 0xA9, ORA_C: 0xB1, CMP_C: 0xB9,
ANA_D: 0xA2, XRA_D: 0xAA, ORA_D: 0xB2, CMP_D: 0xBA,
ANA_E: 0xA3, XRA_E: 0xAB, ORA_E: 0xB3, CMP_E: 0xBB,
ANA_H: 0xA4, XRA_H: 0xAC, ORA_H: 0xB4, CMP_H: 0xBC,
ANA_L: 0xA5, XRA_L: 0xAD, ORA_L: 0xB5, CMP_L: 0xBD,
ANA_M: 0xA6, XRA_M: 0xAE, ORA_M: 0xB6, CMP_M: 0xBE,
ANA_A: 0xA7, XRA_A: 0xAF, ORA_A: 0xB7, CMP_A: 0xBF,
ANI : 0xE6, XRI: 0xEE, ORI: 0xF6, CPI: 0xFE,
/* Move operations */
MOV_B_B: 0x40, MOV_D_B: 0x50, MOV_H_B: 0x60, MOV_M_B: 0x70,
MOV_B_C: 0x41, MOV_D_C: 0x51, MOV_H_C: 0x61, MOV_M_C: 0x71,
MOV_B_D: 0x42, MOV_D_D: 0x52, MOV_H_D: 0x62, MOV_M_D: 0x72,
MOV_B_E: 0x43, MOV_D_E: 0x53, MOV_H_E: 0x63, MOV_M_E: 0x73,
MOV_B_H: 0x44, MOV_D_H: 0x54, MOV_H_H: 0x64, MOV_M_H: 0x74,
MOV_B_L: 0x45, MOV_D_L: 0x55, MOV_H_L: 0x65, MOV_M_L: 0x75,
MOV_B_M: 0x46, MOV_D_M: 0x56, MOV_H_M: 0x66, // HALT 0x76
MOV_B_A: 0x47, MOV_D_A: 0x57, MOV_H_A: 0x67, MOV_M_A: 0x77,
MOV_C_B: 0x48, MOV_E_B: 0x58, MOV_L_B: 0x68, MOV_A_B: 0x78,
MOV_C_C: 0x49, MOV_E_C: 0x59, MOV_L_C: 0x69, MOV_A_C: 0x79,
MOV_C_D: 0x4A, MOV_E_D: 0x5A, MOV_L_D: 0x6A, MOV_A_D: 0x7A,
MOV_C_E: 0x4B, MOV_E_E: 0x5B, MOV_L_E: 0x6B, MOV_A_E: 0x7B,
MOV_C_H: 0x4C, MOV_E_H: 0x5C, MOV_L_H: 0x6C, MOV_A_H: 0x7C,
MOV_C_L: 0x4D, MOV_E_L: 0x5D, MOV_L_L: 0x6D, MOV_A_L: 0x7D,
MOV_C_M: 0x4E, MOV_E_M: 0x5E, MOV_L_M: 0x6E, MOV_A_M: 0x7E,
MOV_C_A: 0x4F, MOV_E_A: 0x5F, MOV_L_A: 0x6F, MOV_A_A: 0x7F,
MOV_B_I: 0x06, MOV_D_I: 0x16, MOV_H_I: 0x26, MOV_M_I: 0x36,
MOV_C_I: 0x0E, MOV_E_I: 0x1E, MOV_L_I: 0x2E, MOV_A_I: 0x3E,
/** potential Z80 compatibility */
BIT: 0xCB, // bit instructions
EXTD: 0xDB, // extended instructions
IX: 0xDD, IX_BIT: 0xCB, // IX instructions, IX bit instructions
IY: 0xFC, IY_BIT: 0xCB, // IY instructions, IY bit instructions
};
for (var i = 0; i < 0xFF; i++) {
operation[i] = function(){};
}